Assignment
The example on page C-12 of Appendix C shows how to generate the logic equation for NS0, the input to the rightmost bit of the state register in Figure 5.37. Derive the equations for NS1, NS2, and NS3.
The example on page C-12 of Appendix C shows how to generate the logic equation for NS0, the input to the rightmost bit of the state register in Figure 5.37. Derive the equations for NS1, NS2, and NS3.