- Two_Digit_Timer.v
- Top-level module for Assignment 4
- clock_module.v
- Clock Module for Assignment 4.
- Four_bit_counter.v
- Four-Bit Counter Module for Assignment 4.
- divide_by_25M.v
- Clock divider: 25.175 MHz in, 1.0 Hz out
- divide_by_2dot5M.v
- Clock divider: 25.175 MHz in, 0.1 Hz out
- hex2sevenseg.v
- Seven segment decoder with correct logic for Segment G.