Introduction
For this assignment, you are to implement the 32-bit ALU for the MIPs processor that is designed in Appendix B of the textbook. Your implementation of the ALU will be a real ALU, not a simulation. You will use a software package called Quartus from a company called Altera. Quartus lets you design a logic circuit as a schematic diagram or by using a Hardware Description Language, such as Verilog. You will be doing this project as a schematic diagram. Once you have constructed your schematic diagram, you will use Quartus to generate a programming file that you will download into a logic device called a Field Programmable Gate Array (FPGA). FPGAs contain a huge number of gates and flip-flops along with special circuitry that allows the gates and flip-flops to be connected together in arbitrary ways. Downloading a configuration file into an FPGA sets the interconnections so that the FPGA actually implements the circuit you designed.
Altera is one of the two largest FPGA manufacturers (the largest one is Xilinx). Both companies have very good programs to support students who are learning how to use their devices. For example, Altera has provided us with licenses to use the full version of Quartus in our lab for free. In addition, you can download a slightly less extensive version for free from their web site to use on your home computer if you wish. (The free version is more than adequate for the projects you will do in this course.) In addition to the Quartus software, Altera makes hardware kits available for student use. These kits have an FPGA mounted on a circuit board, plus the connectors needed for connecting the kit to a PC (for downloading programming files) and to other devices. In addition, the kits have a mixture of input and output devices, such as buttons, switches, and lights (LEDs, light emitting diodes). The kits you will be using are called DE-1, and are manufactured for Altera by a Taiwanese company called Terasic. We have kits that you can use in the lab. In the past some students have bought their own kits to use at home; they can be ordered from the Terasic web site for about $150 and generally are delivered quite quickly.
(Xilinx provides excellent support for students too. In fact, we use their FPGAs in the Hardware Lab Course (CS-345).)
Project Description
You will do the project in a sequence of steps, as described below.
Log into your lab account.
You can log into any one of the computers in SB room A-205 or A-227 using your account name for this course, which consists of your last name followed by the digits “343” all as a single lower-case string. Use the password “343”; you will be required to change it to something secure the first time you log in.
The names of the computers are:
A-205 A-227 birch apple cherry fir chestnut juniper elm mimosa ginkgo peach hemlock pine hickory plum spruce sycamore walnut Room 205 is an “open lab,” which means you can use the computers there any time you want. The secretaries in the CS Department Office (A-202) will open the lab for you if it is closed. Room 227 is a closed lab, so you will not be able to sit at the computers in that room to use them. However, all of the computers are accessible from the Internet. If you have access to a computer running Windows XP or Vista with a broadband connection, you can use Remote Desktop to log in. From the button, go to , to , to , and you will find it. When it asks you what computer you want to connect to, pick one of the names above and add the domain name “.cs.qc.edu” to the computer name. For example, you would log into ginkgo by entering ginkgo.cs.qc.edu.
If you are using a Macintosh, OS X comes with a Remote Desktop program you can use in the same way as the Windows version. Under preferences, be sure to set a screen size and resolution to match your computer’s screen. The default value is very low resolution, making it difficult to use.
There an open source version of Remote Desktop at www.rdesktop.org that might be useful if you are running Linux. But I have had no experience with it.
When you use Remote Desktop, select one of the computers in A-227 so that students who are on campus will be able to use the computers in A-205. Only one person can use a computer at a time, so if the computer you try is occupied, just try another one until you find one that is available.
Build a simple testbed.
I am supplying a testbed and some Verilog code for you to work with for this project. You will also need to reference the DE1 Pin Assignments Chart for setting up your project.
Create a directory named Assignment_02 under the My Projects directory that is already present under the My Documents directory in your lab account. Unzip DE1_Testbed.zip into this directory, giving you three files: DE1_Testbed.bdf, hex2sevenseg.v, and Device_Under_Test.bsf. If you are interested, you can look at the contents of these files using a text editor like Vim or Notepad++ (two text editors that are installed in the lab), but don’t change anything in them. The .bdf file is a “Block Diagram (schematic) File”, like the ones you will be creating for this assignment. The .bsf file is a “Block Symbol File,” which simply tells Quartus how to draw a symbol without specifying the actualy circuitry the symbol represents. Finally, the .v file is a Verilog implementation of a module that converts a four-bit binary number into the correct outputs to respresent the binary number as a hexadecimal digit on a seven-segment display.
Set up your project as demonstrated in class. The project directory is >Assignment_02, and the top-level design element is named DE1_Testbed. Include all three of the files from the zip file in the project. Right now, if you open the DE1_Testbed.bdf file, you will have input and output pins for all the switches, lights (LEDs), and seven-segment displays on the DE1. There are also instances of the hex2sevenseg module for each of the (four) seven-segment displays, and an instance of the “Device Under Test” symbol, which is just a place-holder for whatever circuit you are going to design.
To start, create a new schematic file for your ALU. As mentioned in class, the assignment requires you only to build a 4-bit ALU. Doing a full 32-bit implementation is something you may undertake as an optional step if you want to do it. In your schematic, put input and output pins to match all the inputs and outputs of the 4-bit MIPS ALU: 4 inputs for the A operand (Aoperand[3..0]), 4 inputs for the B operand (Boperand[3..0]), 4 inputs for the function code (function[3..0]), 4 outputs for the result (ALUout[3..0]), and four outputs for the condition code (CVNZ[3..0]). Once you have the pins in place, you can save the schematic: use the name Mini-MU or something else to indicatate that it is a small version of the MIPS ALU. Then create a symbol for the block diagram: File->Create/Update-> Create Symbol Files for Current File. You should be able to go back to the top-level schematic, delete the Device_Under_Test symbol, and insert the symbol for the ALU that you just created. Connect the four Key inputs through four inverters to the function code input of the ALU; connect switches 7..4 to the A operand, switches 3..0 to the B operand, the result to the seven-segment display named Hex1, and connect the condition code bits to Hex0. Ignore unused inputs, and connect unused outputs in the testbed to ground.
At this point, you should be able to compile your project for the first time. Fix any red error messages, but ignore all warnings for now. Now go to the menu item to bring up the Pin Assignments editor. Use the table on the Pin assignments web page to fill in all the pin assignments for the DE1.
Build a simple circuit in your ALU schematic: Connect the A operand to the Result outputs and the B operand to the Condition Code outputs. You should be able to compile the project now; there will still be some warnings about unconnected inputs, but the process should finish.
Plug a DE1 board into one of the USB ports on the computer and verify that it starts going through its “dancing lights” routine. Go to the device programmer (third icon from the right on the toolbar, or use the menu), check the box in the Program/Configure column. Verify that the Hardware Setup says “USB Blaster” near the top of the panel (if it doesn’t, you need to be sure the DE1 is plugged into a USB port, and to click the ‘Hardware Setup” button to select the USB blaster manually. Click Start to program the board, and verify that you can control two right-hand seven segment displays using the eight swithches.
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Set up one bit slice.
The ALU will consist of four Bit Slices. Start a new block diagram, and set up the following input pins: Ain, Bin, Cin, function[3..0], and SLTin. Add the following output pins: result, Cout, and SLTout. Save the file, naming it bitslice.bdf, and convert it to a symbol file.
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Create the elements needed to implement a bit slice.
To implement a bit slice you will need a 4×1 MUX and a full adder. You will also need two circuits for inverting the operands, which you may implement either by building a 2×1 MUX or by using XOR gates; the XOR gates are already available in the Quartus library, but you will have to create schematics for the others. Set up the input and output pins according to the following table:
Element Suggested Name Inputs Outputs Full Adder FA Ain, Bin, Cin Sum, Cout 4×1 MUX Mux_4x1 sel[1:0], In_0, In_1, In_2, In_3 Y 2×1 MUX Mux_2x1 sel, In_0, In_1 Y -
Complete the Design and Test it.
Once you have the lowest-level blocks built, implement them using gates and wires.
The bit-slice design is essentially the same as in the textbook. One possible difference from the textbook is your choice of whether to use 2×1 MUX’s or XOR gates to complement the inputs. Remember that function[3] is the Ainvert input to the slice; function[2] is the Bnegate input; and function[1:0] are used to control the 4×1 MUX.
function Bits Usage function[3] Ainvert function[2] Bnegate function[1..0] Select which output value: AND, OR, FA, SLT A definite difference from the textbook is the addition of the SLTin and SLTout input and output pins, which we will use to connect the slices together in the 4-bit ALU. Connect the Result output of the Full Adder to the SLTout output pin, and connect the SLTin input pin to the #3 input of the 4×1 MUX.
Construct the ALU itself using four instances of the bit-slice block. The function[3..0] inputs go to all four slices, but you have to connect the four bits from each operand to the appropriate slice. Connect the Cout and Cin pins between the slices; connect function[2] to Cin of Full Adder zero (the rightmost one). Include the logic for generating the four condition code bits. Connect the SLTin of all but the rightmost slice to ground, and connect the SLTout of the leftmost slice to the SLTin of the rightmost bit.
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Compile and Test Your ALU
Once you get your project to compile and download successfully, you need to test it and repair errors that you find. To give a common setup for testing, configure the top-level (testbed) design as follows: connect Hex3 and Hex2 to the A and B input operands, Hex1 to ALUout, and Hex0 to CVNZ. Connect the four bits of the function code (the inverted Key inputs) to green LEDs 0 through 3.
Be sure you test various combinations of positive and negative operands against at least the most common function codes: A∧B, A∨B, A+B, A−B, and SLT(A, B).
Submit the Assignment
When your project is ready, send me an email message telling me it is ready for me to review. I will get a copy of your project from your account on the lab server(maple), so there is no need to tell me which computer you were working on. Just tell me that the project is ready for me to look at.
Send your email to me by midnight of the due date. My email address is: vickery at babbage.cs.qc.edu.
You must use exactly this Subject line for your email to be sure I actually receive it: CS-343 Assignment 2. (Include the "CS-343" part in the subject line of all messages you send to me this semester.)
If you do not receive an “OK, I’ll check it out!” reply from me within a day or two of submitting the assignment, it means I did not receive it. But I will be sending that acknowledgement manually, so don’t resubmit the assignment until I have had a chance to reply to the first one.