CS-343 Exam 2 Topics
Spring 2009

Everything listed here is “fair game” for the exam, but I cannot guarantee that I haven’t forgotten something here that just has to be included on the exam. If in doubt, ask on the Course Discussion Board.

• Textbook Chapter 4, Sections 1, 2, 3, and 4
• Textbook Appendix C, Sections 7, 8, 10, and 11
• Textbook Appendix D, Section 2
• Homework Assignments 4, 5
• Class Notes

1. Clocked R-S Latch design and timing
2. D Latch design and timing
3. Master-Slave D Flip-Flop with Enable design and timing (what we called “edge-triggered”)
4. N-bit register design
5. Memory ports
6. General register file design
7. MIPS register file design
8. R, I, and J instruction formats
9. Three uses for I-format instructions
10. Verilog language (all features used on the Green Card)
11. Single-cycle datapath
    • Three ways to compute PC next address; how to select the one to use
      • Computing proper value of immediate field for branch instructions
    • ROM vs RAM
    • Instruction Memory and Data Memory operations
    • Op code decoding
    • Reasons for RegDst, Jump, Branch, MemRead, MemWrite, MemtoReg, ALUSrc, and RegWrite control signals
    • Implication of ALUOp for extending design to include immediate arithmetic/logic instructions
    • Timing analysis of single-cycle design
12. …