Introduction

Be sure you are keeping up to date with the reading assignments for the course.

This assignment is an exercise in using the course lab to implement a set of simple combinational logic circuits: a 2×4 decoder, a 4×1 multiplexer, and a 1-bit full-adder. All of these circuits are so commonly used that there are pre-built versions that you would use in a “real” project. But for this assignment, you are to create each circuit using only AND, OR, and NOT gates.

The Assignment

  1. Log into your lab account and use the Quartus software to start the project.

    Consult the TREE Lab Information page to find out how to log into your account in the lab. Be sure to change your password to something secure. (Press Ctrl-Alt-Delete and use the "Change Password" button.) See the Using Quartus web page for instructions on using the software. Part of the assignment will involved connecting the I/O pins of your design to the LEDs and switches on the logic kit: see the DE1 I/O Pins web page for the information you will need to do that.

    Create a directory named Assignment_02 under your My Projects directory. Be sure to name and capitalize and spell the directory name exactly as shown: I will use a script to retrieve your project from the server, and it will depend on that. Note the underscore in the name.

    Follow the directions in the Using Quartus web page for creating a project in your Assignment_02 directory. The name of the top-level design should be Assignment_02_Testbed.

  2. Set up the testbed.

    There will be 11 inputs and 7 outputs for this assignment. Create a schematic, and add that many pins to it. Put the input pins in a column on the left, and the output pins in a column on the right.

    Name the input pins, from top to bottom: Switch_8 … Switch_0 (we will not use Switch 9 for this assignment), Key_1, and Key_0.

    Name the output pins, again from top to bottom: Red_LED_9, Red_LED_8, Red_LED_7, Red_LED_6, (skip 5), Red_LED_4, (skip 3 and 2), Red_LED_1, and Red_LED_0.

    Save the file with just the named pins in it. The dialog box that comes up should come filled in with “Assignment_02_Testbed” as the file name; if not, change it. Also be sure the "add to project" option is checked.

    Even though you have not implemented the project yet, and despite what it says in the Using Quartus web page, you can run Analysis & Synthesis, ignore all the warnings that come up, and use the Pin Planner to assign your testbed’s pins to the FPGA pins. The names you assigned to the pins will show up in the Pin planner, and you can assign them to FPGA pins according to the table on the DE1 Pins page.

  3. Set up the circuits.

    Create another block diagram file and put 11 input pins in a column on the left and 7 output pins in a column on the right.

    • The top two inputs will be the inputs to the 2×4 decoder: name them IN_0 and IN_1.
    • The next four inputs will be the data input to the 4×1 multiplexer: name them Data_0, Data_1, Data_2, and Data_3.
    • The next three inputs will be the inputs to the full adder: name them A, B, and C_in.
    • The bottom two inputs will be the selection inputs to the 4×1 multiplexer: name them Sel_1 and Sel_0.
    • The top four outputs will be the outputs of the decoder: name them Y0, Y1, Y2, and Y3.
    • The next output will be the output of the multiplexer: name it just plain Y.
    • The bottom two outputs will be the Sum and Cout outputs of the full adder.

    Save this file using the name Assignment_02. Again, be sure it gets added to the project.

    Create a symbol for this diagram; the “Using Quartus” web page tells how.

    Insert a copy of this new symbol into the testbed schematic, and connect the testbed pins to the corresponding pins on the symbol. That is, switches 8 and 9 will be the inputs to the decoder, switches 6, 5, 4, and 3 will be the data inputs to the multiplexer, switches 2, 1, and 0 will be the inputs to the full adder, keys 1 and 0 will be the selector input to the multiplexer, red LEDs 9-6 will be the outputs of the decoder, red LED 4 will be the output of the multiplexer, and red LEDs 1 and 0 will be the sum and carry out outputs of the full adder.

  4. Build and test the circuit.

    Build the three circuits using only AND, OR, and NOT gates. I suggest you test each one as you build it rather than trying to test all three at once. The “Using Quartus” page tells how to compile and download the project.

    You should be able to put switches 9 and 8 into the four combinations of up (1) and down (0) to cause the leftmost four red LEDS to light up one at a time.

    You should be able to set a mix of ones and zeros into switches 6—3, and use the right two pushbuttons (keys) to select which value shows up in red LED 4.

    You should be able to read the number of switches in positions 0—1 that are up (1) as a binary number in red LEDs 0 and 1.

Submit The Assignment

  1. Once you have tested that all three of your circuits work as specified, simply log out of your account so that your project will be copied back to oak, where I will go to get a copy for grading. Send me an email message when your assignment is ready.
  2. Be sure to put your name in your email message!

  3. Do not submit the assignment until you have actually tested it to be sure it works. If you tested it but cannot get it to work in time, you may submit the assignment for partial credit provided you tell me in your email what problem(s) you observed during testing.

  4. The Subject line must be CS-343 Assignment 2 to avoid my spam filters.
  5. Send your email to either Christopher.VickeryATqc.cuny.edu or vickeryATbabbage.cs.qc.cuny.edu — but not to both.

See the course syllabus for grading and late homework policies.